About This Call for Proposals (CFP)
The APRIL AI Hub aspires to unite the electronics and artificial intelligence (AI) communities for developing and bringing to market AI-based tools for boosting productivity across the entire electronics industry supply chain.
The APRIL AI Hub is transforming the electronics industry by: i) developing world-leading AI research relevant to the electronics industry, ii) building a strong expandable network that combines the entire electronics and AI supply chains, and influences the direction of research, policy and regulation, iii) enabling the adoption of technology into business through the creation of AI tools or translation into new start-ups, iv) generating a strong pipeline of talent that spans AI and electronics through workshops, training and the network.
The APRIL AI Hub has previously funded 19 projects (up to £50k each) across 12 UK universities. This initiative was designed to support innovative, early-stage projects that advance responsible AI in the electronics sector, bridging the gap between academia and industry through meaningful collaboration.
This targeted call aims to leverage four of the key AI-driven tools developed by researchers at the APRIL AI Hub for Electronics. An outline of these tools and supporting documentation is provided in the appendices of this page. In this call, proposals that do not use at least one of these tools as an integral part of the research cannot be considered.
Proposals must be attached to one or more of the following tools:
- Electronic Materials Ontology System (EMOS)
- Semiconductor Traceability and AI-assisted Research System (STARS)
- Language Model-assisted electronic Design Automation (LaMDA)
- Proof-centric RTL Agentic Model for Assurance, Narrative, and Automation (PRAMANA)
Timeline
17 August 2026 - Submissions Open
16 September 2026 (12:00 BST) - Expression of Interest Deadline
2 October 2026 (12:00 BST) - Submission Deadline
9 October 2026 - Pitch Invitation of Finalists to Summit
26 October 2026 - Gala Dinner (Invitation Only)
27-28 October - Annual Summit 2026 in Sheffield (Finalists Required to Attend in Person)
Decision to follow at end of the Annual Summit.
1 January 2027 - Projects Commence
Award Details
Selected principal investigators (PIs) may receive:
- Up to £100k (paid in arrears) for a 12-months project duration
- All payments are made upon completion of the project duration.
Applicant Eligibility
A PI or project collaborator must:
- Have a contract of employment with an eligible research organisation for the duration of the grant before they apply.
- Be recognised by their institution and UKRI/EPSRC as an eligible PI.
- Applicants should comply with standard UKRI PI eligibility criteria.
- Each person can submit one proposal as PI or collaborator.
Criteria to be shortlisted:
- The outcome tool has to be open-sourced (CC or Apache license, as appropriate)
- The outcome(s) must align with the APRIL vision
- Clear 'Vision to impact' statement to identify long-term possibilities
- Participation in APRIL summits events (attendance in 2026, presentation in 2027 and 2028)
Proposal Requirements:
- Proposals should follow the proposal template.
- Proposals should not exceed three pages, excluding appendices.
- Proposals should be returned as pdf file.
Expectations of Recipients
Award recipients should make all reasonable efforts to acknowledge the support of APRIL AI Hub and reference how specific hardware and software contributed to project results.
Recipients will inform APRIL AI Hub of publications, presentations, open-source code and data releases, and speaking engagements that reference the supported project to the allocated project officer. Failure to report these outputs will influence future award selection.
Software developed in the course of the project will be hosted on the APRIL AI Hub Github Page.
Express your interest via this form: APRIL AI Hub Tool Sandpit Competition Expression of Interest – Fill in form
Download submission template here: Submission Template
Submit your proposal here: APRIL AI Hub Summit Sandpit Competition Proposal Form – Fill in form
Appendix A: Electronic Materials Ontology System (EMOS)
Purpose:
EMOS is an open-source, community-extensible framework designed to unify and standardise the digital discovery ecosystem for electronic materials. Built on a microkernel architecture using standardized input-output data contracts and a canonical property dictionary, it connects siloed crystal databases, generative models, and ML property predictors into automated, end-to-end device design pipelines.
Current Capabilities:
Strictly operating in-silico (digital candidate generation and computational screening); it is currently not integrated with physical synthesis or in-physico laboratory automation loops.
Integrated Assets: Aggregates 6 inorganic databases (~1.75M compounds), 5 property predictors, 7 generative models, and 254 canonical property definitions. Accessible via a dedicated web app, API, and visual node editor.
Demonstrated Case Studies:
- Multi-criteria database extraction across targeted application spaces.
- Crystallographic similarity screening and deduplication using AMD/PDD invariants.
- Multi-source thermodynamic stability consensus analysis.
- End-to-end material-to-device screening pipelines (e.g., channel material selection for MOSFETs).
Dependencies:
Core Backend: Python 3.x, Flask, REST APIs / Server-Sent Events (SSE).
Infrastructure & Execution: Docker containerization (for model encapsulation), standard web client stack (HTML/JS/CSS).
Preliminary Documentation:
Preprint: https://www.researchsquare.com/article/rs-10451683/v1
Github Repository: https://github.com/aprilaihub/EMOS
Web-application: https://aprilaihub.github.io/EMOS/
Potential directions:
Below we outline several potential directions for extending the EMOS framework. These should be regarded as illustrative suggestions rather than an exhaustive list. Applicants are strongly encouraged to propose their own research ideas, provided they align with the remit of the APRIL Hub (https://www.april.ac.uk/vision/).
Application-Specific Extensions: Adapting and deploying EMOS workflows for targeted device domains such as wide-bandgap power electronics, phase-change memory, neuromorphic devices, and photovoltaics.
Automated AI Discovery Pipelines: Building agentic workflows to dynamically compose and automate end-to-end digital candidate generation and screening.
In-Physico Integration: Extending framework interfaces to bridge computational predictions with automated experimental validation, feeding candidate releases directly into physical laboratory validation loops such as Self-Driving Laboratories (SDLs).
Appendix B: Semiconductor Traceability and AI-assisted Research System (STARS)
Purpose:
STARS is the Semiconductor Traceability and AI-assisted Research System. STARS is a scalable, AI platform for automated testing workflows across emerging electronic devices, such as memristors, TFTs, and small circuits. The key innovation is in capturing structured device and wafer meta-data from the fabrication process. Through its automated operation for one-by-one testing of devices, STARS supports a ~3× speed-up in the daily throughput of an 8-hour shift by a human researcher. Furthermore, STARS enables interactive exploration of thousands of experiments, with optimised loading time and minimised search time. Parallel measurement workflows using the ArC Two board scale throughput by up to 32×, versus the serial version using ArC One board, and 96× versus fully manual measurements. This forms a corpus of structured measurement data and processing conditions immediately ready for AI inference.
Current Capabilities:
The STARS framework has been validated on high-throughput electrical characterisation of memristors. Comprising:
- Database of memristor measurements implemented in SQL, spanning 10 different device technologies, with associated meta-data
- Characterisation viewing GUI to quickly compare devices and experiments
- Fabrication data ingestion tools to facilitate rapid meta-data capture.
Dependencies:
Python: 3.9+ recommended
SQL backend
Preliminary Documentation:
Please refer to the official STARS page https://www.april.ac.uk/resources/resources/semiconductor-traceability-and-ai-assisted-research-system-stars/ for related papers and software access.
Potential Directions:
Below we outline several potential directions for extending the STARS framework. These should be regarded as illustrative suggestions rather than an exhaustive list. Applicants are strongly encouraged to propose their own research ideas, provided they align with the remit of the APRIL Hub (https://www.april.ac.uk/vision/).
Appendix C: Language Model-assisted electronic Design Automation (LaMDA)
Purpose:
LaMDA is a flexible framework that integrates Large Language Models (LLMs) with commercial Electronic Design Automation (EDA) tools. Specifically, LLMs are used to (i) generate design artefacts—including circuit netlists, Verilog HDL code, and design constraints—for the simulation, synthesis, and implementation of target circuits; and (ii) analyse reports generated by EDA tools to provide recommendations for design refinement and optimisation. This flexibility enables LaMDA to support a wide range of design flows, including analogue, digital, and radio-frequency circuit design.
Current Capabilities:
The LaMDA framework has been validated across the following case studies:
- Analogue design flow. Design, sizing, simulation, and analysis of operational transconductance amplifiers, with simulations performed using Cadence Spectre.
- Digital design flow. Benchmarking of digital circuits described in Verilog HDL and targeting implementation on Field-Programmable Gate Arrays (FPGAs), with simulation, synthesis, and implementation carried out using AMD Vivado.
- Radio-frequency design flow. Design, simulation, analysis, and optimisation of microstrip patch antennas, with simulations performed using Keysight ADS.
Dependencies:
Python: 3.9+ recommended
API Keys: OpenAI, Google depending on chosen model/provider
EDA Tools (feature-dependent):
Cadence Spectre
AMD Vivado
Keysight ADS
Designer Responsibility: It is the responsibility of the designer to ensure the required EDA tools are correctly installed, licensed, and accessible on their own server/workstation.
Operating System:
Analogue/FPGA flows are Linux-oriented
RF flow is currently Windows-oriented
Preliminary Documentation:
Please refer to the official LaMDA page https://www.april.ac.uk/resources/resources/language-model-assisted-electronic-design-automation/ for related papers and software access.
Potential Directions:
Below we outline several potential directions for extending the LaMDA framework. These should be regarded as illustrative suggestions rather than an exhaustive list. Applicants are strongly encouraged to propose their own research ideas, provided they align with the remit of the APRIL Hub (https://www.april.ac.uk/vision/).
Investigation of specific AI-assisted design stages. One promising research direction attracting significant interest is analogue layout automation. Applicants may explore how LaMDA could be extended to support this capability. Proposals are also encouraged to investigate AI techniques beyond LLMs.
Transition from commercial to open-source LLMs. Adopting open-source LLMs would enable model fine-tuning using design reports and EDA outputs, potentially leading to more accurate and targeted design optimisation recommendations. Applicants may propose effective approaches for integrating open-source LLMs and developing efficient fine-tuning methodologies.
Expansion to additional commercial EDA tools/design flows. LaMDA could be extended to support additional design flows, such as digital ASIC design (for example, using Cadence or Synopsys tools for digital design). A key challenge in this area is the secure handling of Process Design Kit (PDK) information, particularly where proprietary, non-open-source PDKs are involved.
Improving accessibility. LaMDA is currently operated through a command-line interface. A valuable extension would be the development of a comprehensive graphical user interface (GUI) to improve usability, streamline interaction with the framework, and facilitate the analysis and interpretation of design results.
Appendix D: Proof-centric RTL Agentic Model for Assurance, Narrative, and Automation (PRAMANA)
Purpose:
PRAMANA is an open-source, community-extensible framework for agentic formal assurance of register-transfer-level (RTL) hardware designs. It combines quality assessment, formal proof execution, solver selection, and failure interpretation into a proof-centric workflow for improving confidence in AI-generated verification collateral. The framework is intended to connect AI-generated artefacts with executable formal checks, rather than treating assertion generation as an end point.
Current Capabilities:
Mutation-Guided Refinement (MGR): generates RTL mutants, audits properties and formal verification harnesses (or formal harness, in short), and uses surviving mutants as feedback for iterative formal harness refinement.
Predictive Solver Portfolio (PSP): extracts structural RTL metrics, selects a suitable Satisfiability Modulo Theories (SMT) backend and Bounded Model Checking (BMC) configuration, and generates ready-to-run SymbiYosys files.
Causal Narrative Synthesis (CNS): converts failing BMC traces into trace-grounded narratives identifying the failing cycle, relevant signals, failure mechanism, and likely root cause.
Reproducible evaluation assets: the repository includes formal setups and benchmark artefacts spanning communication, memory, control, cryptographic, and datapath RTL designs.
The current implementation begins after the initial formal harness-generation stage, which is treated as a bootstrap prerequisite. Applicants may therefore propose extensions that make this front end more autonomous, robust, and reusable.
Dependencies:
Core formal infrastructure: Yosys, SymbiYosys, smtbmc, and open-source SMT backends including Yices, Z3, and Bitwuzla.
Execution environment: Python 3.9+, Docker, and the repository devcontainer or an equivalent Linux-based environment.
Agentic extensions: an LLM SDK and API access are required only for components that generate or interpret natural-language artefacts; the core MGR and PSP workflows use open-source tools.
Applicants are responsible for ensuring that the required open-source tools, compute resources, and any optional commercial EDA tools are correctly installed, licensed, and accessible on their own server or workstation.
Preliminary Documentation:
Open-source repository: https://github.com/eelab-dev/EEdigits
Peer-reviewed, accepted paper: https://arxiv.org/abs/2606.21451
Potential Directions:
Below we outline several potential directions for extending the PRAMANA framework. These should be regarded as illustrative suggestions rather than an exhaustive list. Applicants are strongly encouraged to propose their own research ideas, provided they align with the remit of the APRIL Hub (https://www.april.ac.uk/vision/).
Extending PRAMANA across the verification lifecycle: Applicants may explore how PRAMANA could complement the tools engineers already use, connecting formal reasoning with simulation, coverage, linting, emulation, CI/CD, or post-silicon validation. The aim is to make proof-derived insight useful throughout development, rather than only during a dedicated formal-verification activity.
Applying PRAMANA to new hardware challenges: Different designs expose different assurance problems. Applicants may adapt PRAMANA to areas such as processors, AI accelerators, communication systems, hardware security, low-power designs, or safety-critical electronics, introducing domain knowledge and workflows appropriate to those systems.
Compositional and Scalable Formal Verification: Investigating proof-complexity diagnosis, staged proof decomposition, assume-guarantee reasoning, auxiliary lemmas, abstraction and refinement, and structured proof plans that hand tractable sub-obligations to model checkers or theorem provers.
Transition-Coverage Closure and Complete Test/Property Sets: Developing AI-assisted methods to identify uncovered or unreachable transitions and to synthesize the smallest, useful set of simulation tests and formal properties needed to approach complete behavioural coverage.
Audit-Ready Evidence for AI-Assisted Formal Verification: Developing machine-readable, provenance-rich and replayable proof packages that connect requirements, generated artefacts, assumptions, solver results, counterexamples, coverage, mutation outcomes, model and prompt versions, and human approvals. Where supported by the backend, independently checkable proof certificates and assurance-case representations may also be investigated for safety-critical engineering workflows.
