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Research

APRIL's main task is to deliver world-leading AI research relevant to the electronics and semiconductor industry. To achieve this, research activities are organized in "5 pillar areas + 5 capability areas" that any UK academic or industrial institution can access via appropriate financing mechanisms to develop AI-driven capabilities.

Main Pillars

To ensure we maintain, and exceed, our position in this market, we need to bring the power of AI to the 5 main pillars of the electronics supply chain:

P : 1
PILLAR ONE
Materials Discovery

Pillar 1 Lead

Prof. Jacqueline Cole

Pillar 1 Lead

Prof. Subramanian Ramamoorthy

Develop AI tools that can optimise material compositions for engineering electron devices with desirable behaviours, accelerating materials discovery and their use in sustainable manners. This spans from "AlphaFold-style" property prediction to automated post-production assessment of e.g., defect detection or physical properties.
P : 2
PILLAR TWO
Device Design

Pillar 2 Lead

Dr Bipin Rajendran

Pillar 2 Lead

Prof. Merlyne De Souza

Establish AI-based systems that can design and execute experiments in search of the best manufacturing parameter settings to create electron devices with optimum performance and yield. This would immensely speed up the "process development" procedure that takes a new device to the market, delivering more efficient, reliable and sustainable products quicker. This spans from optimal "device recipe" prediction to automated testing and yield assessment.
P : 3
PILLAR THREE
Circuit & System Design

Pillar 3 Lead

Dr Christos Bouganis

Pillar 3 Lead

Prof. Michael O'Boyle

Introduce AI into commercially available circuit design tools to autonomously synthesise new circuit topologies and system architectures to drastically cut the design time, and optimise the cumbersome transfer of known topologies into new complementary metal-oxide semiconductor (CMOS) technologies. It spans human-AI digital circuit co-design (using natural language specs) to automated circuit topology discovery and place & route optimisation for building efficient chips.
P : 4
PILLAR FOUR
Testing & Verification

Pillar 4 Lead

Prof. Máire O'Neill

Pillar 4 Lead

Prof. Kerstin Eder

Embed AI principles in testing to reduce the required time and to predict what to test/when. Spans from improving scenario coverage in certification tests across devices/systems to automatically deciphering underlying physical mechanisms in emerging beyond-CMOS devices.
P : 5
PILLAR FIVE
Modelling

Pillar 5 Lead

Prof. Vihar Georgiev

Pillar 5 Lead

Prof. Rishad Shafik

Build "digital twins" for modelling device/systems performance, with input from automated testing routines. This would significantly boost the rate at which new semiconductor technologies mature to a level usable by circuit designers. This pillar spans from automated process development for new and emerging semiconductor devices to efficient modelling of complex systems.

Core Capabilities

The vertical pillars' structure of APRIL is complemented by a horizontal structure of fundamental, cross- cutting capabilities that shall underpin our ability to deliver each pillar. We anticipate that most hub tasks will draw upon these, hence having highly professional/specialized capability in all (and flexibly allocable) is a key productivity-enhancing ingredient of the APRIL hub.

C : 1
CAPABILITY ONE
Data collection
Running a successful AI model requires the ability to collect data that is designed appropriately for AI to digest. This is applicable to all pillars and having specialised knowledge on doing precisely that is of paramount importance.
C : 2
CAPABILITY TWO
AI model selection
The vast array of AI models is expanding at an incredibly fast rate and knowing which model to choose for different tasks is critically important. This enables APRIL to keep abreast with and push the boundaries of state-of-the-art AI models. Tt is especially relevant when considering generative models and techniques (from task-specific output generation to general text, like GPT).
C : 3
CAPABILITY THREE
AI model training
Training can be extremely computationally intensive, as well as requiring specialised techniques in cases where the amount of training data is minimal. It is essential to be able to advise on the best AI, machine learning (ML), statistical, and high performance computing techniques to optimise training.
C : 4
CAPABILITY FOUR
System integration
Transforming research into useable technology requires significant attention to "containers and interfaces", i.e., software packages that can choreograph multiple modules, extract meaningful insights, and present friendly interfaces to users inputting complex or big data. This is key to translating technology and is a fundamental axis of our impact strategy.
C : 5
CAPABILITY FIVE
Data security
There is a significant need to evaluate the suitability of system architectures, specifications, and implementation methodologies for trusted, responsible, explainable and secure AI solutions. Focusing on cybersecurity and trustworthy systems in safety-critical industries is important for our impact strategy to protect against attacks, interpret predictions, and better understand AI systems.

Projects

APRIL will deliver I0 interconnected research projects (2 per pillar) using the PDRA/F time available to the hub. These have been chosen to build core, general-purpose capability within the hub, shall span the duration of the proposed project (Y1-5) and will be led by UoE collaboratively with all academic leads from across the UK. The following chart gives an overview of the research activities.

APRIL HUB'S MAIN TASK

Delivering World-leading AI research in electronics & semiconductors

Pillar 1 Lead

Prof. Jacqueline Cole

University of Cambridge

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An expert in combining AI with data science, computational methods and experimental research she holds an RAEng RAEng Research Professorship.

Jacqueline Cole is the Royal Academy of Engineering Professor of Materials Physics, University of Cambridge. Her research and leadership are interdisciplinary, international, innovative, and collaborative, as recognized by the: Warren Diffraction Physics Award 2021; Royal Society Clifford Paterson Medal, 2020; 1851 Royal Commission Design Fellowship (2015-8), Fulbright Award (2013-4); Vice Chancellor’s Research Chair, University of New Brunswick, Canada (2008-13); Royal Society University Research Fellowship (2001-11); Royal Society of Chemistry SAC Silver Medal (2009); Brian Mercer Feasibility Award (2007); 18th Franco-British Science prize (2006); Senior and Junior Research Fellowships (1999-2009), St Catharine’s College, Cambridge; British Crystallographic Association Chemical Crystallography Prize (2000); London Business School (LBS) Diversity in Leadership Award (2021); LBS Social Good Award (2023).

Some Relevant Publications:

Digitizing Images of Electrical-Circuit Schematics. Kelly, C.R., Cole, J.M., (2024). APL Machine Learning, 2, 016109.

Gradient boosted and statistical feature selection workflow for materials property predictions. Jung, S.G., Jung, G., Cole, J.M., (2023). J. Chem. Phys., 159, 194106. 

ReactionDataExtractor 2.0: A deep-learning approach for data extraction from chemical reaction schemes. Wilary, D.M., Cole, J.M., (2023). J. Chem. Inf. Model., 63, 19, 6053–6067. 

Bayesian Particle Instance Segmentation for Electron Microscopy Image Quantification. Yildirim, B., Cole, J.M., (2021). J. Chem. Inf. Model., 61, 1136–1149. 

A Design-to-Device Pipeline for Data-Driven Materials Discovery. Cole, J.M., (2020). Acc. Chem. Res., 53, 599-610.

Pillar 1 Lead

Prof. Subramanian Ramamoorthy

University of Edinburgh

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An expert in Robot Learning and Autonomy in the School of Informatics. He is a Turing fellow and the Director of the Institute of Perception, Action and Behaviour.

Subramanian Ramamoorthy is a Professor of Robot Learning and Autonomy in the School of Informatics at the University of Edinburgh, where he is also Director of the Institute of Perception, Action and Behaviour and Director of the UKRI AI CDT in Dependable and Deployable AI for Robotics.

His research explores machine learning and its uses in robotics and autonomous systems. This includes physics informed machine learning and the problem of trustworthiness in AI. This work has attracted funding from a variety of sources including UKRI, EU, DARPA, DSTL and the Royal Academy of Engineering, and been recognised with best paper awards at international conferences including ICRA, IROS, CoRL, ICDL and EACL.

In addition to his academic role, he has been involved in Five AI, a UK based technology company developing autonomous vehicles technology, as Vice President - Prediction and Planning (2017 - 2020) and Scientific Advisor (2021-23). Five AI was acquired by Bosch GmbH in 2022.

 

Publications:

Lower dimensional kernels for video discriminators. Kahembwe, E., Ramamoorthy, S., (2020). Neural Networks Journal, Special Issue on Deep Neural Network Representation and Generative Adversarial Learning, Volume 132, pp. 506-520.


Vid2Param: Modelling of dynamics parameters from video. Asenov, M., Burke, M., Angelov, D., Davchev, T., Subr, K., Ramamoorthy, S., (2020). IEEE Robotics and Automation Letters, Vol 5(2): 414-421.

Learning physics-informed simulation models for soft robotic manipulation: A case study with dielectric elastomer actuators. Lahariya, M., Innes, C., Develder, C., Ramamoorthy, S., (2022). In Proc. IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), pp. 11031-11038.

A generative force model for surgical skill quantification using sensorised instruments. Straižys, A., Burke, M., Brennan, P.M., Ramamoorthy, S., (2023). Communications Engineering, Vol. 2, Article 36.

On specifying for trustworthiness. Abeywickrama, D.B., Bennaceur, A., Chance, G., Demiris, Y., Kordoni, A., Levine, M., Moffat, L., Moreau, L., Mousavi, M.R., Nuseibeh, B., Ramamoorthy, S., Ringert, J.O., Wilson, J., Windsor, S., Eder, K., (2024). Communications of the ACM, Vol. 67 no. 1, pp. 98-109.

 

Pillar 2 Lead

Dr Bipin Rajendran

King’s College London

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An expert on building algorithms, devices, and systems for brain-inspired computing. He is an EPSRC Fellow and an IBM Faculty Award recipient.

Bipin Rajendran is a Professor of Intelligent Computing Systems in the Department of Engineering, King's College London, where he directs the King's Laboratory for Intelligent Computing. He also co-leads the Centre for Intelligent Information Processing (CIIPS).

He received a B. Tech degree from I.I.T. Kharagpur in 2000, and M.S. and Ph.D. degrees in Electrical Engineering from Stanford University in 2003 and 2006, respectively. He was a Master Inventor and Research Staff Member at IBM T. J. Watson Research Center in New York during 2006-'12 and has held faculty positions in India and the US.

His research focuses on building algorithms, devices, and systems for intelligent computing systems. He has co-authored over 95 papers in peer-reviewed journals and conferences, one monograph, one edited book, and 59 issued U.S. patents. He is a recipient of the IBM Faculty Award (2019), IBM Research Division Award (2012), and IBM Technical Accomplishment Award (2010). He was elected a senior member of the US National Academy of Inventors in 2019.

His research has been supported by Engineering and Physical Sciences Research Council (EPSRC), the US National Science Foundation (NSF), the European Commission, the European Space Agency, Semiconductor Research Corporation as well as Intel, IBM, and Cisco. In 2022, he was awarded an Open Fellowship of the EPSRC.

 

Publications:

Ultra-Low Power Neuromorphic Obstacle Detection Using a Two-Dimensional Materials-Based Subthreshold Transistor. Thakar, K., Rajendran, B., Lodha, S. (2023). npj 2D Materials and Applications.

Bayesian Inference on Binary Spiking Networks Leveraging Nanoscale Device Stochasticity. Katti, P., Skatchkovsky, N., Simeone, O., Rajendran, B., Al-Hashimi, B. M. (2023). IEEE International Symposium on Circuits and Systems 2023.

Accurate deep neural network inference using computational phase-change memory. Joshi, V., Le Gallo, M., Haefeli, S., Boybat, I., Nandakumar, S.R., Piveteau, C., Dazzi, M., Rajendran, B., Sebastian, A., Eleftheriou, E. (2020). Nature Communications, 11, Article number: 2473.

Mixed-precision deep learning based on computational memory. Nandakumar, S.R., Le Gallo, M., Piveteau, C., Joshi, V., Mariani, G., Boybat, I., Karunaratne, G., Khaddam-Aljameh, R., Egger, U., Petropoulos, A., Antonakopoulos, T.A., Rajendran, B., Sebastian, A., Eleftheriou, E. (2020). Frontiers in Neuroscience, Volume 14-2020.

Experimental Demonstration of Supervised Learning in Spiking Neural Networks with Phase-Change Memory Synapses. Nandakumar, S.R., Boybat, I., Le Gallo, M., Eleftheriou, E., Sebastian, A., Rajendran, B. (2020). Scientific Reports, 10, Article number: 8080.

Pillar 2 Lead

Prof. Merlyne De Souza

University of Sheffield

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An expert on the physics of devices, materials and their microelectronic applications in computing, communications, and energy conversion.

Merlyne De Souza received her PhD from the University of Cambridge in 1994.  She was appointed Professor of Electronics and Materials at De Montfort University in 2003 and Professor of Microelectronics at the University of Sheffield in 2007. She has been a technical committee member of the IEDM (2012-2017) and IRPS (2003-2013). She has co-authored over 200 articles to date and is a distinguished lecturer and VP of future emerging technologies of the IEEE Electron Device Society.

 

Publications:

Quantum Topological Neuristors for Advanced Neuromorphic Intelligent Systems. Assi, D. S., Huang, H., Karthikeyan, V., Theja, V. C. S., de Souza, M. M., Xi, N., Li, W. J., Roy, V. A. L. (2023).Advanced Science, 10, 2300791.

Reservoir computing for temporal data classification using a dynamic Solid Electrolyte ZnO thin film transistor. Gaurav, A., Song, X., Manhas, S., Gilra, A., Vasilaki, E., Roy, P., De Souza, M. M. (2022). Frontiers in Electronics.

Pillar 3 Lead

Dr Christos Bouganis

Imperial College London

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An expert in reconfigurable computing and design automation mainly targeting digital signal processing algorithms. He leads the Intelligent Digital Systems Lab at Imperial College.

Christos-Savvas Bouganis is a Professor of Intelligent Digital Systems in the Department of Electrical and Electronic Engineering, Imperial College London, U.K. He is leading the iDSL group at Imperial College (https://www.imperial.ac.uk/idsl), with a focus on the theory and practice of reconfigurable computing and design automation, mainly targeting the domains of Machine Learning, Computer Vision, and Robotics. 

Publications:

SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip. Toupas, P., Yu, Z., Bouganis, C.-S., Tzovaras, D. (2024). IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM).

Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor Decomposition. Yu, Z., Bouganis, C.-S. (2023).International Conference on Field-Programmable Logic and Applications (FPL).

HARFLOW3D: A Latency-Oriented 3D-CNN Accelerator Toolflow for HAR on FPGA Devices. Toupas, P., Montgomerie-Corcoran, A., Bouganis, C.-S., Tzovaras, D. (2023). IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM).

Window-Based Early-Exit Cascades for Uncertainty Estimation: When Deep Ensembles are More Efficient than Single Models. Xia, G., Bouganis, C.-S. (2023). International Conference on Computer Vision (ICCV).

fpgaConvNet: Mapping Regular and Irregular Convolutional Neural Networks on FPGAs. Venieris, S.I., Bouganis, C.-S. (2018). IEEE Transactions on Neural Networks and Learning Systems.

 

Pillar 3 Lead

Prof. Michael O'Boyle

University of Edinburgh

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An expert on the automatic exploitation of heterogeneous hardware using neural embeddings, program synthesis and neural machine translation. He holds EPSRC Established Career Fellowship.

Michael O'Boyle is a professor of Computing and Director of the Institute for Computing Systems Architecture at the University of Edinburgh School of Informatics. O'Boyle's research interests include adaptive compilation, machine learning based optimization, auto-parallelising compilers and heterogeneous GPGPU multi-core platforms. He is project leader of the MilePost gcc project and founding member of the European Network of Excellence on High Performance and Embedded Architecture and Compilation.

Pillar 4 Lead

Prof. Máire O'Neill

Queen’s University of Belfast

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An expert in hardware security, she is the Director of the Centre for Secure Information Technologies at Queen's University Belfast and of the UK Research Institute in Secure Hardware and Embedded Systems (RISE).

Professor Máire O’Neill (FREng, FIAE, MRIA) has a strong international reputation for her research in hardware security and applied cryptography. She is the Director of the Institute of Electronics, Communications and Information Technology (ECIT: www.qub.ac.uk/ecit) and Principal Investigator of the Centre for Secure Information Technologies (CSIT: www.csit.qub.ac.uk ), QUB, and is currently Director of the £5M UK Research Institute in Secure Hardware and Embedded Systems (RISE: www.ukrise.org). She previously held a UK EPSRC Leadership Fellowship (2008-2014) and was a former holder of a UK Royal Academy of Engineering research fellowship (2003-2008). She also led the €3.8M EU H2020 SAFEcrypto (Secure architectures for Future Emerging Cryptography) project (2014-2018). She has received numerous awards which include a Blavatnik Engineering and Physical Sciences medal, 2019, a Royal Academy of Engineering Silver Medal, 2014 and British Female Inventor of the Year 2007. She has authored two research books and over 150 peer-reviewed conference and journal publications. She is Associate Editor for IEEE TC and IEEE TETC and secretary of the IEEE Circuits and Systems for Communications Technical committee. She is a member of the Royal Irish Academy, a Fellow of the Irish Academy of Engineering, and was elected Fellow of the Royal Academy of Engineering in September 2019. 

Pillar 4 Lead

Prof. Kerstin Eder

University of Bristol

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An expert in design verification she is the Head of the Trustworthy Systems Laboratory at the University of Bristol. She received an RAEng "Excellence in Engineering" Prize.

Research activities are focused on specification, verification and analysis techniques which allow designers to define a design and to verify/explore its behaviour in terms of functional correctness, performance, power consumption and energy efficiency. My work includes both formal methods and state-of-the-art simulation/test-based approaches. I have a strong background in computational logic, especially formal verification, declarative programming, abstract machines, compilation techniques and meta programming.

Publications:

On Specifying for Trustworthiness. Abeywickrama, D.B., Bennaceur, A., Chance, G., Demiris, Y., Kordoni, A., Levine, M., Moffat, L., Moreau, L., Mousavi, M.R., Nuseibeh, B., Ramamoorthy, S., Ringert, J.O., Wilson, J., Windsor, S., & Eder, K. (2022). ACM Digital Library, pp. 98-109. ArXiv (Cornell University).

AERoS: Assurance of Emergent Behaviour in Autonomous Robotic Swarms. Abeywickrama, Dhaminda B., Wilson, John, Lee, Soo, Chance, Graham, Winter, Peter D., Manzini, Andrea, Habli, Ibrahim, Windsor, Simon, Hauert, Sabine, Eder, Kerstin. (2023). Computer Safety, Reliability, and Security. SAFECOMP 2023 Workshops. SAFECOMP 2023. Lecture Notes in Computer Science, vol 14182. Springer, Cham.

Supervised Learning for Coverage-Directed Test Selection in Simulation-Based Verification. Masamba, N., Eder, K., Blackmore, T. (2022). In 2022 IEEE International Conference On Artificial Intelligence Testing (AITest), Newark, CA, USA (pp. 19-25). IEEE.

Using Neural Networks for Novelty-based Test Selection to Accelerate Functional Coverage Closure. Zheng, X., Eder, K., Blackmore, T. (2023). In 2023 IEEE International Conference On Artificial Intelligence Testing (AITest), Athens, Greece (pp. 114-121).

Lost In Translation: Exposing Hidden Compiler Optimization Opportunities. Georgiou, K., Chamski, Z., Garcia, A., May, D., Eder, K. (2022). The Computer Journal, Volume 65, Issue 3, Pages 718-735.

Pillar 5 Lead

Prof. Vihar Georgiev

University of Glasgow

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An expert in developing numerical solvers and machine learning methods that are used for modelling and simulations of various semiconductor devices. He holds an EPSRC Industrial Fellowship.

Vihar is a Professor of Nanoelectronics and the leader of the DeepNano Group at the University of Glasgow. He holds an EPSRC UKRI Innovation Fellowship and serves as a Visiting Professor at TU Vienna. Previously, from 2015 until January 2024, he co-led the Device Modelling Group. The DeepNano Group, established on January 1, 2024, aims to advance research in modelling and simulations of electronic devices. The group integrates analytical, numerical, machine learning, and artificial intelligence methods in its research approach.

The research activities of the DeepNano Group are centred on modelling and simulating nanoscale devices for applications in advanced optoelectronics, biosensors, and quantum technologies. Collaborations include leading experimental groups at IBM, STMicroelectronics, IMEC, Synopsys, and Synopsys QuantumATK. Vihar's group collaborates with academic institutions in the UK, USA, China, South Korea, India, Japan, Austria, Switzerland, Spain, France, Italy, Poland, Germany, and Bulgaria. They actively promote open science practices and welcome collaborations with interested parties worldwide.

Publications:

Machine Learning Approach for Predicting the Effect of Statistical Variability in Si Junctionless Nanowire Transistors. Carrillo-Nuñez, H., Dimitrova, N., Asenov, A., Georgiev, V. (2019). IEEE Electron Device Letters, vol. 40, no. 9, pp. 1366-1369.

Convolutional Machine Learning Method for Accelerating Nonequilibrium Green’s Function Simulations in Nanosheet Transistor. Aleksandrov, P., Rezaei, A., Dutta, T., Xeni, N., Asenov, A., Georgiev, V. (2023). IEEE Transactions on Electron Devices, vol. 70, no. 10, pp. 5448-5453.

Fully Convolutional Generative Machine Learning Method for Accelerating Non-Equilibrium Green’s Function Simulations. Aleksandrov, P., Rezaei, A., Xeni, N., Dutta, T., Asenov, A., Georgiev, V. (2023). 2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Kobe, Japan, pp. 169-172.

Machine Learning Inspired Nanowire Classification Method based on Nanowire Array Scanning Electron Microscope Images. Brugnolotto, E., Aleksandrov, P., Sousa, M., Georgiev, V.(2024).Open Res Europe, 4:43.

Combinations of Analytical and Machine Learning Methods in a Single Simulation Framework for Amphoteric Molecules Detection. Kumar, N., Aleksandrov, P., Gao, Y., Macdonald, C., García, C.P., Georgiev, V. (2024).IEEE Sensors Letters, vol. 8, no. 7, pp. 1-4, July 2024, Art no. 1501004.

Pillar 5 Lead

Prof. Rishad Shafik

Newcastle University

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An expert in intelligent and energy-efficient electronic systems and new AI hardware architectures. He is the Director of the Stephenson AI Lab at Newcastle University.

Professor Rishad Shafik (RS) is a Personal Chair in Microelectronic Systems Design and EEE Research Director at Newcastle University. He is an international leader of hardware/software co-design applied in machine learning systems. He has published in excess of 200 research articles in major peer-reviewed IEEE/ACM journals and conferences, with 4 of them winning the best paper awards and 4 others nominated for best paper awards. His research contributed to circa £29m research grants as PI/CoI funded by EPSRC, Research Council of Norway (RCN) and Industries. Most recently, he is the Newcastle PI of EPSRC £6.5 SONNETS Programme and Newcastle PI of RCN funded £1.13m SecurioTM and £1m CareLearner projects. Underpinned on two recent patents and £500k accelerator grants from EPSRC and Research England, he has recently founded Literal Labs AI (a Newcastle University spinout specialising in ML co-processor architectures and embedded solutions).  

Publications: 

Tarasyuk, O., Gorbenko, A., Shafik, R. and Yakovlev, A. Multi-Layer Tsetlin Machine: Architecture and Performance Evaluation, IEEE Computer Society International Symposium on Tsetlin Machine (ISTM), Pittsburgh, USA, 2024.

Ghazal, O., Lan, T., Ojukwu, S., Krishnamurthy, K., Yakovlev, A. and Shafik, R. In-Memory Learning Automata Architecture using Y-Flash Cell, IEEE Computer Society International Symposium on Tsetlin Machine (ISTM), Pittsburgh, USA, 2024.

Lan, T., Ghazal, O., Chan, A., Ojukwu, S., Shafik, R. and Yakovlev, A. Time-Domain Argmax Architecture for Tsetlin Machine Classification, IEEE Computer Society International Symposium on Tsetlin Machine (ISTM), Pittsburgh, USA, 2024.

Lan, T., Ghazal, O., Ojukwu, S., Krishnamurthy, K., Shafik, R. and Yakovlev, A. An Asynchronous Winner-Takes-All Arbitration Architecture for Tsetlin Machine Acceleration, IEEE International NEWCAS Conference, Canada, 2024.

Chan, A., Wheeldon, A., Shafik, R. and Yakovlev, A. Design of Event-driven Tsetlin Machines using safe Petri nets, Petri Nets, accepted, Geneva, Switzerland, 2024.

Rahman, T., Mao, G., Maheshwari, S., Shafik, R. and Yakovlev, A.. MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications, Design Automation and Test in Europe (DATE), accepted, Valencia, Spain, 2024.

Tunheim, S.A., Jiao, L., Shafik, R., Yakovlev, A. and Granmo, O-C. Convolutional Tsetlin Machine-based Training and Inference Accelerator for 2-D Pattern Classification. Microprocessors and Microsystems, Volume 103, 104949, November 2023. [online: https://tinyurl.com/bdh87p8u]

Yu, S., Xia, F., Shafik, R., Balsamo, D. and Yakovlev, A. Approximate digital-in analog-out multiplier with asymmetric nonvolatility and low energy consumption. Integration, Volume 93, 102045, November 2023. [online: https://tinyurl.com/55r7we84]

Tousif Rahman, Gang Mao, Sidharth Maheshwari, Komal Krishnamurthy, Rishad Shafik and Alex Yakovlev, Parallel Symbiotic Random Number Generator for Training Tsetlin Machines on FPGA, 2nd IEEE Computer Society International Symposium on the Tsetlin Machine (ISTM2023), Newcastle, UK.

Prajwal Kumar Sahu, Srinivas Boppu, Rishad Shafik, Svein Anders Tunheim, Ole-Christoffer Granmo and Linga Reddy Cenkeramaddi, Enhancing Inference Performance through Include only Literal Incorporation in Tsetlin Machine, 2nd IEEE Computer Society International Symposium on the Tsetlin Machine (ISTM2023), Newcastle, UK.

Maheshwari, S., Rahman, T., Shafik, R., Yakovlev, A., Rafiev, A., Liao, J. and Granmo, O.-C. REDRESS: Generating Compressed Models for Edge Inference Using Tsetlin Machines, IEEE Transactions on Pattern Analysis and Machine Intelligence (TPAMI), (accepted), 2023.

C. K., Sivasubramani, S., Shafik, R. and Acharyya, A. Nano-Magnetic Logic based Architecture Design Methodology for the Tsetlin Machine for Energy Efficient Applications, 21st IEEE Interregional NEWCAS Conference (NEWCAS) , Edinburgh, UK, 2023.

Singh, S., Awf, O., Jha, C. K, Rana, V., Drechsler, R., Shafik, R. Yakovlev, A., Patkar, S. and Merchant, F. (2023). Finite State Automata Design using 1T1R ReRAM Crossbar. 21st IEEE Interregional NEWCAS Conference (NEWCAS) , Edinburgh, UK, 2023.